Analyzer Frame Types

1-Wire

`reset` Reset pulse
No data properties
`presence` Presence Pulse
No data properties
`rom_command`
ROM command. This is the first command issued by the master after a presence pulse
`description`	str	read, skip, search, or match
`rom_command`	bytes	The command byte
`crc`
8 bit CRC, last part of the 64 bit identifier
`crc`	bytes	The CRC byte
`family_code`
The family code of the device ID
`family`	bytes	The family code, which is the first part of the 64 bit identifier
`id`
The 48 bit device identifier
`id`	int	48 bit integer, taken from the center of the 64 bit identifier
`data`
Data byte after the ROM command and identifier
`data`	bytes	A single data byte
`invalid_rom_command`
Unknown ROM command
`rom_command`	bytes	The ROM command byte
`alarm`
Alarm search command
`rom_command`	bytes	The command byte

`pixel`
Represents a single RGB pixel value
`index`	int	The index along the LED strip. Index 0 is the first LED
`red`	int	The red channel, [0-255]
`green`	int	The green channel, [0-255]
`blue`	int	The blue channel, [0-255]

`data`
A single serial word
`data`	bytes	The serial word, the width in bits is controlled by the serial settings
`error`	str	(optional) Present if an error was detected when decoding this word
`address`	bool	(optional) Present if multi-processor or multi-drop bus special modes were selected. True indicates that this is an address byte

`identifier_field`
`identifier`	int	Identifier, either 11 bit or 29 bit
`extended`	bool	(optional) Indicates that this identifier is a 29 bit extended identifier. This key is not present on regular 11 bit identifiers
`remote_frame`	bool	(optional) Present and true for remote frames
`control_field`
`num_data_bytes`	int	Number of data bytes in the transaction
`data_field`
`data`	int	The byte
`crc_field`
`crc`	int	16 bit CRC value
`ack_field`
`ack`	bool	True when an ACK was present
`can_error` Invalid CAN data was encountered
No data properties

`address`
I2C address byte
`address`	bytes	The 7 bit I2C address
`read`	bool	True for read operations, false for write operations
`ack`	bool	True when the address was ACKed, false when NAKed
`error`	str	(optional) Present if an there was a problem reading the I2C data
`data`
I2C data byte
`data`	bytes	8 bit data word
`ack`	bool	True when the data byte was ACKed, false when NAKed
`error`	str	(optional) Present if an there was a problem reading the I2C data
`start` I2C start condition
No data properties
`stop` I2C stop condition
No data properties

`error`
I2S decode error
`error`	str	Error details. I2C errors usually indicate the wrong number of bits inside of a frame
`data`
A single sample from a single channel
`channel`	int	channel index. 0 or 1
`data`	int	Audio value. signed or unsigned, based on I2S/PCM analyzer settings

`no_frame` Inter-byte space
No data properties
`header_break` Header break
No data properties
`header_sync` Header sync
No data properties
`header_pid`
Protected identifier
`protected_id`	int	6 bit protected Id
`data`
`data`	int	Data byte
`index`	int	Index, 0-8, of the data byte inside of the transaction
`checksum`
Checksum byte
`checksum`	int	LIN checksum
`data_or_checksum`
Unable to determine if this byte is a data byte or a checksum. It is technically valid as both. This occurs if a a data byte, at index N, is equal to what the CRC should be if the transaction is N-1 bytes.
`checksum`	int	LIN checksum
`data`	int	Data byte
`index`	int	Index, 0-8, of the data byte inside of the transaction

`<disassembly>`
This is the decoded manchester word
`ROM adr`	str	ROM Address
`ROM val`	bytes	ROM Value
`BUS (x2)`	bytes	Bus X2 Phase Nibble
`BUS (x3)`	bytes	Bus X3 Phase Nibble

`data`
This is the decoded manchester word
`data`	int	The size in bytes is determined by the settings

`enable` Indicates the enable (chip select) signal has transitioned from inactive to active, present when the enable channel is used
No data properties
`disable` Indicates the enable signal has transitioned back to inactive, present when the enable channel is used
No data properties
`result`
A single word transaction, containing both MISO and MOSI
`miso`	bytes	Master in slave out, width in bits is determined by settings
`mosi`	bytes	Master out slave in, width in bits is determined by settings
`error` Indicates that the clock was in the wrong state when the enable signal transitioned to active
No data properties

`data`
A single parallel word
`data`	int	Data word, the width in bits is determined by the number of enabled data channels